uhd

INCLUDE(${CMAKE_SOURCE_DIR}/lib/usrp/usrp1/CMakeLists.txt)

#

# Copyright 2010 Ettus Research LLC

#

# This program is free software: you can redistribute it and/or modify

# it under the terms of the GNU General Public License as published by

# the Free Software Foundation, either version 3 of the License, or

# (at your option) any later version.

#

# This program is distributed in the hope that it will be useful,

# but WITHOUT ANY WARRANTY; without even the implied warranty of

# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

# GNU General Public License for more details.

#

# You should have received a copy of the GNU General Public License

# along with this program.  If not, see <http://www.gnu.org/licenses/>.

#

#This file will be included by cmake, use absolute paths!

INCLUDE_DIRECTORIES(${CMAKE_SOURCE_DIR}/../firmware/fx2/include)

LIBUHD_APPEND_SOURCES(

    ${CMAKE_SOURCE_DIR}/lib/usrp/usrp1/clock_ctrl.cpp

    ${CMAKE_SOURCE_DIR}/lib/usrp/usrp1/clock_ctrl.hpp

    ${CMAKE_SOURCE_DIR}/lib/usrp/usrp1/codec_ctrl.cpp

    ${CMAKE_SOURCE_DIR}/lib/usrp/usrp1/codec_ctrl.hpp

    ${CMAKE_SOURCE_DIR}/lib/usrp/usrp1/codec_impl.cpp

    ${CMAKE_SOURCE_DIR}/lib/usrp/usrp1/dboard_impl.cpp

    ${CMAKE_SOURCE_DIR}/lib/usrp/usrp1/dboard_iface.cpp

    ${CMAKE_SOURCE_DIR}/lib/usrp/usrp1/dsp_impl.cpp

    ${CMAKE_SOURCE_DIR}/lib/usrp/usrp1/io_impl.cpp

    ${CMAKE_SOURCE_DIR}/lib/usrp/usrp1/mboard_impl.cpp

    ${CMAKE_SOURCE_DIR}/lib/usrp/usrp1/usrp1_iface.cpp

    ${CMAKE_SOURCE_DIR}/lib/usrp/usrp1/usrp1_iface.hpp

    ${CMAKE_SOURCE_DIR}/lib/usrp/usrp1/usrp1_impl.cpp

    ${CMAKE_SOURCE_DIR}/lib/usrp/usrp1/usrp1_impl.hpp

    ${CMAKE_SOURCE_DIR}/lib/usrp/usrp1/usrp1_ctrl.cpp

    ${CMAKE_SOURCE_DIR}/lib/usrp/usrp1/usrp1_ctrl.hpp

)

//

// Copyright 2010 Ettus Research LLC

//

// This program is free software: you can redistribute it and/or modify

// it under the terms of the GNU General Public License as published by

// the Free Software Foundation, either version 3 of the License, or

// (at your option) any later version.

//

// This program is distributed in the hope that it will be useful,

// but WITHOUT ANY WARRANTY; without even the implied warranty of

// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

// GNU General Public License for more details.

//

// You should have received a copy of the GNU General Public License

// along with this program.  If not, see <http://www.gnu.org/licenses/>.

//

#include "clock_ctrl.hpp"

#include "fpga_regs_standard.h"

#include <uhd/utils/assert.hpp>

#include <boost/cstdint.hpp>

#include <boost/assign/list_of.hpp>

#include <boost/foreach.hpp>

#include <utility>

#include <iostream>

using namespace uhd;

/***********************************************************************

 * Constants

 **********************************************************************/

static const double master_clock_rate = 64e6;

/***********************************************************************

 * Clock Control Implementation

 **********************************************************************/

class usrp1_clock_ctrl_impl : public usrp1_clock_ctrl {

public:

    usrp1_clock_ctrl_impl(usrp1_iface::sptr iface)

    {

        _iface = iface;

    }

    double get_master_clock_freq(void)

    {

        return master_clock_rate; 

    }

    /***********************************************************************

     * RX Dboard Clock Control (output 9, divider 3)

     **********************************************************************/

    void enable_rx_dboard_clock(bool)

    {

        std::cerr << "USRP: enable_rx_dboard_clock() disabled" << std::endl;

        _iface->poke32(FR_RX_A_REFCLK, 0);

        _iface->poke32(FR_RX_B_REFCLK, 0);

    }

    std::vector<double> get_rx_dboard_clock_rates(void)

    {

#if 0 

        std::vector<double> rates;

        for (size_t div = 1; div <= 127; div++)

            rates.push_back(master_clock_rate / div);

        return rates;

#else

        return std::vector<double>(1, 64e6);

#endif

    }

    /*

     * Daughterboard reference clock register

     *

     * Bit  7    - 1 turns on refclk, 0 allows IO use

     * Bits 6:0  - Divider value

     */

    void set_rx_dboard_clock_rate(double)

    {

#if 0

        assert_has(get_rx_dboard_clock_rates(), rate, "rx dboard clock rate");

        size_t divider = size_t(rate/master_clock_rate);

        _iface->poke32(FR_RX_A_REFCLK, (divider & 0x7f) | 0x80);

#else

        std::cerr << "USRP: set_rx_dboard_clock_rate() disabled" << std::endl;

        _iface->poke32(FR_RX_A_REFCLK, 0);

        _iface->poke32(FR_RX_B_REFCLK, 0);

#endif

    }

    /***********************************************************************

     * TX Dboard Clock Control

     **********************************************************************/

    void enable_tx_dboard_clock(bool)

    {

        std::cerr << "USRP: set_tx_dboard_clock() disabled" << std::endl;

        _iface->poke32(FR_TX_A_REFCLK, 0);

        _iface->poke32(FR_TX_B_REFCLK, 0);

    }

    std::vector<double> get_tx_dboard_clock_rates(void)

    {

        return get_rx_dboard_clock_rates(); //same master clock, same dividers...

    }

    void set_tx_dboard_clock_rate(double)

    {

        std::cerr << "USRP: set_tx_dboard_clock_rate() disabled" << std::endl;

        _iface->poke32(FR_TX_A_REFCLK, 0);

        _iface->poke32(FR_TX_B_REFCLK, 0);

    }

private:

    usrp1_iface::sptr _iface;

};

/***********************************************************************

 * Clock Control Make

 **********************************************************************/

usrp1_clock_ctrl::sptr usrp1_clock_ctrl::make(usrp1_iface::sptr iface)

{

    return sptr(new usrp1_clock_ctrl_impl(iface));

}

//

// Copyright 2010 Ettus Research LLC

//

// This program is free software: you can redistribute it and/or modify

// it under the terms of the GNU General Public License as published by

// the Free Software Foundation, either version 3 of the License, or

// (at your option) any later version.

//

// This program is distributed in the hope that it will be useful,

// but WITHOUT ANY WARRANTY; without even the implied warranty of

// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

// GNU General Public License for more details.

//

// You should have received a copy of the GNU General Public License

// along with this program.  If not, see <http://www.gnu.org/licenses/>.

//

#ifndef INCLUDED_USRP1_CLOCK_CTRL_HPP

#define INCLUDED_USRP1_CLOCK_CTRL_HPP

#include "usrp1_iface.hpp"

#include <boost/shared_ptr.hpp>

#include <boost/utility.hpp>

#include <vector>

/*!

 * The usrp1 clock control:

 * - Setup system clocks.

 * - Disable/enable clock lines.

 */

class usrp1_clock_ctrl : boost::noncopyable{

public:

    typedef boost::shared_ptr<usrp1_clock_ctrl> sptr;

    /*!

     * Make a new clock control object.

     * \param iface the usrp1 iface object

     * \return the clock control object

     */

    static sptr make(usrp1_iface::sptr iface);

    /*!

     * Get the rate of the fpga clock line.

     * \return the fpga clock rate in Hz

     */

    virtual double get_master_clock_freq(void) = 0;

    /*!

     * Get the possible rates of the rx dboard clock.

     * \return a vector of clock rates in Hz

     */

    virtual std::vector<double> get_rx_dboard_clock_rates(void) = 0;

    /*!

     * Get the possible rates of the tx dboard clock.

     * \return a vector of clock rates in Hz

     */

    virtual std::vector<double> get_tx_dboard_clock_rates(void) = 0;

    /*!

     * Set the rx dboard clock rate to a possible rate.

     * \param rate the new clock rate in Hz

     * \throw exception when rate cannot be achieved

     */

    virtual void set_rx_dboard_clock_rate(double rate) = 0;

    /*!

     * Set the tx dboard clock rate to a possible rate.

     * \param rate the new clock rate in Hz

     * \throw exception when rate cannot be achieved

     */

    virtual void set_tx_dboard_clock_rate(double rate) = 0;

    /*!

     * Enable/disable the rx dboard clock.

     * \param enb true to enable

     */

    virtual void enable_rx_dboard_clock(bool enb) = 0;

    /*!

     * Enable/disable the tx dboard clock.

     * \param enb true to enable

     */

    virtual void enable_tx_dboard_clock(bool enb) = 0;

};

#endif /* INCLUDED_USRP1_CLOCK_CTRL_HPP */

//

// Copyright 2010 Ettus Research LLC

//

// This program is free software: you can redistribute it and/or modify

// it under the terms of the GNU General Public License as published by

// the Free Software Foundation, either version 3 of the License, or

// (at your option) any later version.

//

// This program is distributed in the hope that it will be useful,

// but WITHOUT ANY WARRANTY; without even the implied warranty of

// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

// GNU General Public License for more details.

//

// You should have received a copy of the GNU General Public License

// along with this program.  If not, see <http://www.gnu.org/licenses/>.

//

#include "codec_ctrl.hpp"

#include "usrp_commands.h"

#include "fpga_regs_standard.h"

#include "usrp_spi_defs.h"

#include "ad9862_regs.hpp"

#include <uhd/types/dict.hpp>

#include <uhd/utils/assert.hpp>

#include <uhd/utils/algorithm.hpp>

#include <uhd/utils/byteswap.hpp>

#include <boost/cstdint.hpp>

#include <boost/tuple/tuple.hpp>

#include <boost/math/special_functions/round.hpp>

#include <boost/assign/list_of.hpp>

#include <iostream>

#include <iomanip>

#include <cstdio>

using namespace uhd;

static const bool codec_debug = true; 

const gain_range_t usrp1_codec_ctrl::tx_pga_gain_range(-20, 0, float(0.1));

const gain_range_t usrp1_codec_ctrl::rx_pga_gain_range(0, 20, 1);

/***********************************************************************

 * Codec Control Implementation

 **********************************************************************/

class usrp1_codec_ctrl_impl : public usrp1_codec_ctrl {

public:

    //structors

    usrp1_codec_ctrl_impl(usrp1_iface::sptr iface);

    ~usrp1_codec_ctrl_impl(void);

    //aux adc and dac control

    float read_aux_adc(aux_adc_t which);

    void write_aux_dac(aux_dac_t which, float volts);

    //duc control

    bool set_duc_freq(double freq);

    //pga gain control

    void set_tx_pga_gain(float);

    float get_tx_pga_gain(void);

    void set_rx_pga_gain(float, char);

    float get_rx_pga_gain(char);

private:

    usrp1_iface::sptr _iface;

    ad9862_regs_t _ad9862_regs;

    aux_adc_t _last_aux_adc_a, _last_aux_adc_b;

    void send_reg(boost::uint8_t addr);

    void recv_reg(boost::uint8_t addr);

    //FIXME: poison

    double _tx_freq[4];

    unsigned int compute_freq_control_word_9862 (double master_freq,

                                                 double target_freq,

                                                 double *actual_freq);

};

/***********************************************************************

 * Codec Control Structors

 **********************************************************************/

usrp1_codec_ctrl_impl::usrp1_codec_ctrl_impl(usrp1_iface::sptr iface)

{

    _iface = iface;

    //soft reset

    _ad9862_regs.soft_reset = 1;

    this->send_reg(0);

    //initialize the codec register settings

    _ad9862_regs.sdio_bidir = ad9862_regs_t::SDIO_BIDIR_SDIO_SDO;

    _ad9862_regs.lsb_first = ad9862_regs_t::LSB_FIRST_MSB;

    _ad9862_regs.soft_reset = 0;

    //setup rx side of codec

    _ad9862_regs.byp_buffer_a = 1;

    _ad9862_regs.byp_buffer_b = 1;

    _ad9862_regs.buffer_a_pd = 1;

    _ad9862_regs.buffer_b_pd = 1;

    _ad9862_regs.rx_pga_a = 0;//0x1f;  //TODO bring under api control

    _ad9862_regs.rx_pga_b = 0;//0x1f;  //TODO bring under api control

    _ad9862_regs.rx_twos_comp = 1;

    _ad9862_regs.rx_hilbert = ad9862_regs_t::RX_HILBERT_DIS;

    //setup tx side of codec

    _ad9862_regs.two_data_paths = ad9862_regs_t::TWO_DATA_PATHS_BOTH;

    _ad9862_regs.interleaved = ad9862_regs_t::INTERLEAVED_INTERLEAVED;

    _ad9862_regs.tx_pga_gain = 199; //TODO bring under api control

    _ad9862_regs.tx_hilbert = ad9862_regs_t::TX_HILBERT_DIS;

    _ad9862_regs.interp = ad9862_regs_t::INTERP_4;

    _ad9862_regs.tx_twos_comp = 1;

    _ad9862_regs.fine_mode = ad9862_regs_t::FINE_MODE_NCO;

    _ad9862_regs.coarse_mod = ad9862_regs_t::COARSE_MOD_BYPASS;

    _ad9862_regs.dac_a_coarse_gain = 0x3;

    _ad9862_regs.dac_b_coarse_gain = 0x3;

    //setup the dll

    _ad9862_regs.input_clk_ctrl = ad9862_regs_t::INPUT_CLK_CTRL_EXTERNAL;

    _ad9862_regs.dll_mult = ad9862_regs_t::DLL_MULT_2;

    _ad9862_regs.dll_mode = ad9862_regs_t::DLL_MODE_FAST;

    //setup clockout

    _ad9862_regs.clkout2_div_factor = ad9862_regs_t::CLKOUT2_DIV_FACTOR_2;

    //write the register settings to the codec

    for (uint8_t addr = 0; addr <= 25; addr++) {

        this->send_reg(addr);

    }

    //aux adc clock

    _ad9862_regs.clk_4 = ad9862_regs_t::CLK_4_1_4;

    this->send_reg(34);

}

usrp1_codec_ctrl_impl::~usrp1_codec_ctrl_impl(void)

{

    //set aux dacs to zero

    this->write_aux_dac(AUX_DAC_A, 0);

    this->write_aux_dac(AUX_DAC_B, 0);

    this->write_aux_dac(AUX_DAC_C, 0);

    this->write_aux_dac(AUX_DAC_D, 0);

    //power down

    _ad9862_regs.all_rx_pd = 1;

    this->send_reg(1);

    _ad9862_regs.tx_digital_pd = 1;

    _ad9862_regs.tx_analog_pd = ad9862_regs_t::TX_ANALOG_PD_BOTH;

    this->send_reg(8);

}

/***********************************************************************

 * Codec Control Gain Control Methods

 **********************************************************************/

void usrp1_codec_ctrl_impl::set_tx_pga_gain(float gain)

{

    int gain_word = int(63*(gain - tx_pga_gain_range.min)/(tx_pga_gain_range.max - tx_pga_gain_range.min));

    _ad9862_regs.tx_pga_gain = std::clip(gain_word, 0, 63);

    this->send_reg(16);

}

float usrp1_codec_ctrl_impl::get_tx_pga_gain(void)

{

    return (_ad9862_regs.tx_pga_gain*(tx_pga_gain_range.max - tx_pga_gain_range.min)/63) + tx_pga_gain_range.min;

}

void usrp1_codec_ctrl_impl::set_rx_pga_gain(float gain, char which)

{

    int gain_word = int(0x14*(gain - rx_pga_gain_range.min)/(rx_pga_gain_range.max - rx_pga_gain_range.min));

    gain_word = std::clip(gain_word, 0, 0x14);

    switch(which){

    case 'A':

        _ad9862_regs.rx_pga_a = gain_word;

        this->send_reg(2);

        return;

    case 'B':

        _ad9862_regs.rx_pga_b = gain_word;

        this->send_reg(3);

        return;

    default: UHD_THROW_INVALID_CODE_PATH();

    }

}

float usrp1_codec_ctrl_impl::get_rx_pga_gain(char which)

{

    int gain_word;

    switch(which){

    case 'A': gain_word = _ad9862_regs.rx_pga_a; break;

    case 'B': gain_word = _ad9862_regs.rx_pga_b; break;

    default: UHD_THROW_INVALID_CODE_PATH();

    }

    return (gain_word*(rx_pga_gain_range.max - rx_pga_gain_range.min)/0x14) + rx_pga_gain_range.min;

}

/***********************************************************************

 * Codec Control AUX ADC Methods

 **********************************************************************/

static float aux_adc_to_volts(boost::uint8_t high, boost::uint8_t low)

{

    return float((boost::uint16_t(high) << 2) | low)*3.3/0x3ff;

}

float usrp1_codec_ctrl_impl::read_aux_adc(aux_adc_t which)

{

    //check to see if the switch needs to be set

    bool write_switch = false;

    switch(which) {

    case AUX_ADC_A1:

    case AUX_ADC_A2:

        if (which != _last_aux_adc_a) {

            _ad9862_regs.select_a = (which == AUX_ADC_A1)?

                ad9862_regs_t::SELECT_A_AUX_ADC1: ad9862_regs_t::SELECT_A_AUX_ADC2;

            _last_aux_adc_a = which;

            write_switch = true;

        }

        break;

    case AUX_ADC_B1:

    case AUX_ADC_B2:

        if (which != _last_aux_adc_b) {

            _ad9862_regs.select_b = (which == AUX_ADC_B1)?

                ad9862_regs_t::SELECT_B_AUX_ADC1: ad9862_regs_t::SELECT_B_AUX_ADC2;

            _last_aux_adc_b = which;

            write_switch = true;

        }

        break;

    }

    //write the switch if it changed

    if(write_switch) this->send_reg(34);

    //map aux adcs to register values to read

    static const uhd::dict<aux_adc_t, boost::uint8_t> aux_dac_to_addr = boost::assign::map_list_of

        (AUX_ADC_A2, 26) (AUX_ADC_A1, 28)

        (AUX_ADC_B2, 30) (AUX_ADC_B1, 32)

    ;

    //read the value

    this->recv_reg(aux_dac_to_addr[which]+0);

    this->recv_reg(aux_dac_to_addr[which]+1);

    //return the value scaled to volts

    switch(which) {

    case AUX_ADC_A1: return aux_adc_to_volts(_ad9862_regs.aux_adc_a1_9_2, _ad9862_regs.aux_adc_a1_1_0);

    case AUX_ADC_A2: return aux_adc_to_volts(_ad9862_regs.aux_adc_a2_9_2, _ad9862_regs.aux_adc_a2_1_0);

    case AUX_ADC_B1: return aux_adc_to_volts(_ad9862_regs.aux_adc_b1_9_2, _ad9862_regs.aux_adc_b1_1_0);

    case AUX_ADC_B2: return aux_adc_to_volts(_ad9862_regs.aux_adc_b2_9_2, _ad9862_regs.aux_adc_b2_1_0);

    }

    UHD_ASSERT_THROW(false);

}

/***********************************************************************

 * Codec Control AUX DAC Methods

 **********************************************************************/

void usrp1_codec_ctrl_impl::write_aux_dac(aux_dac_t which, float volts)

{

    //special case for aux dac d (aka sigma delta word)

    if (which == AUX_DAC_D) {

        boost::uint16_t dac_word = std::clip(boost::math::iround(volts*0xfff/3.3), 0, 0xfff);

        _ad9862_regs.sig_delt_11_4 = boost::uint8_t(dac_word >> 4);

        _ad9862_regs.sig_delt_3_0 = boost::uint8_t(dac_word & 0xf);

        this->send_reg(42);

        this->send_reg(43);

        return;

    }

    //calculate the dac word for aux dac a, b, c

    boost::uint8_t dac_word = std::clip(boost::math::iround(volts*0xff/3.3), 0, 0xff);

    //setup a lookup table for the aux dac params (reg ref, reg addr)

    typedef boost::tuple<boost::uint8_t*, boost::uint8_t> dac_params_t;

    uhd::dict<aux_dac_t, dac_params_t> aux_dac_to_params = boost::assign::map_list_of

        (AUX_DAC_A, dac_params_t(&_ad9862_regs.aux_dac_a, 36))

        (AUX_DAC_B, dac_params_t(&_ad9862_regs.aux_dac_b, 37))

        (AUX_DAC_C, dac_params_t(&_ad9862_regs.aux_dac_c, 38))

    ;

    //set the aux dac register

    UHD_ASSERT_THROW(aux_dac_to_params.has_key(which));

    boost::uint8_t *reg_ref, reg_addr;

    boost::tie(reg_ref, reg_addr) = aux_dac_to_params[which];

    *reg_ref = dac_word;

    this->send_reg(reg_addr);

}

/***********************************************************************

 * Codec Control SPI Methods

 **********************************************************************/

void usrp1_codec_ctrl_impl::send_reg(boost::uint8_t addr)

{

    boost::uint32_t reg = _ad9862_regs.get_write_reg(addr);

    if (codec_debug) {

        std::cout.fill('0');

        std::cout << "codec control write reg: 0x";

        std::cout << std::setw(8) << std::hex << reg << std::endl;

    }

    _iface->transact_spi(SPI_ENABLE_CODEC_A,

                         spi_config_t::EDGE_RISE, reg, 16, false);

}

void usrp1_codec_ctrl_impl::recv_reg(boost::uint8_t addr)

{

    boost::uint32_t reg = _ad9862_regs.get_read_reg(addr);

    if (codec_debug) {

        std::cout.fill('0');

        std::cout << "codec control read reg: 0x";

        std::cout << std::setw(8) << std::hex << reg << std::endl;

    }

    boost::uint32_t ret = _iface->transact_spi(SPI_ENABLE_CODEC_A,

                                        spi_config_t::EDGE_RISE, reg, 16, true);

    if (codec_debug) {

        std::cout.fill('0');

        std::cout << "codec control read ret: 0x";

        std::cout << std::setw(8) << std::hex << ret << std::endl;

    }

    _ad9862_regs.set_reg(addr, boost::uint16_t(ret));

}

/***********************************************************************

 * DUC tuning 

 **********************************************************************/

unsigned int usrp1_codec_ctrl_impl::compute_freq_control_word_9862(

                    double master_freq, double target_freq, double *actual_freq)

{

    double sign = 1.0;

    if (target_freq < 0)

        sign = -1.0;

    int v = (int) rint (fabs (target_freq) / master_freq * pow (2.0, 24.0));

    *actual_freq = v * master_freq / pow (2.0, 24.0) * sign;

    fprintf(stdout,

       "compute_freq_control_word_9862: target = %g  actual = %g  delta = %g  v = %8d\n",

       target_freq, *actual_freq, *actual_freq - target_freq, v);

    return (unsigned int) v;

}

bool usrp1_codec_ctrl_impl::set_duc_freq(double freq)

{

    int channel = 0;

    float dac_rate = 128e6;

    double coarse;

    std::cout << "duc_freq: " << freq << std::endl;

    // First coarse frequency

    double coarse_freq_1 = dac_rate / 8;

    // Second coarse frequency

    double coarse_freq_2 = dac_rate / 4;

    // Midpoint of [0 , freq1] range

    double coarse_limit_1 = coarse_freq_1 / 2;

    // Midpoint of [freq1 , freq2] range

    double coarse_limit_2 = (coarse_freq_1 + coarse_freq_2) / 2;

    // Highest meaningful frequency

    double high_limit = (double) 44e6 / 128e6 * dac_rate;

    if (freq < -high_limit) {              // too low

        return false;

    }

    else if (freq < -coarse_limit_2) {     // For 64MHz: [-44, -24)

        _ad9862_regs.neg_coarse_tune = ad9862_regs_t::NEG_COARSE_TUNE_NEG_SHIFT;

        _ad9862_regs.coarse_mod = ad9862_regs_t::COARSE_MOD_FDAC_4;

        coarse = -coarse_freq_2;

    }

    else if (freq < -coarse_limit_1) {     // For 64MHz: [-24, -8)

        _ad9862_regs.neg_coarse_tune = ad9862_regs_t::NEG_COARSE_TUNE_NEG_SHIFT;

        _ad9862_regs.coarse_mod = ad9862_regs_t::COARSE_MOD_FDAC_8;

        coarse = -coarse_freq_1;

    }

    else if (freq < coarse_limit_1) {      // For 64MHz: [-8, 8)

        _ad9862_regs.coarse_mod = ad9862_regs_t::COARSE_MOD_BYPASS;

        coarse = 0; 

    }

    else if (freq < coarse_limit_2) {      // For 64MHz: [8, 24)

        _ad9862_regs.neg_coarse_tune = ad9862_regs_t::NEG_COARSE_TUNE_POS_SHIFT;

        _ad9862_regs.coarse_mod = ad9862_regs_t::COARSE_MOD_FDAC_8;

        coarse = coarse_freq_1;

    }

    else if (freq <= high_limit) {         // For 64MHz: [24, 44]

        _ad9862_regs.neg_coarse_tune = ad9862_regs_t::NEG_COARSE_TUNE_POS_SHIFT;

        _ad9862_regs.coarse_mod = ad9862_regs_t::COARSE_MOD_FDAC_4;

        coarse = coarse_freq_2;

    }

    else {                                 // too high

        return false;

    }

    double fine = freq - coarse;

    // Compute fine tuning word...

    // This assumes we're running the 4x on-chip interpolator.

    // (This is required to use the fine modulator.)

    unsigned int v = compute_freq_control_word_9862 (dac_rate / 4, fine,

                                                     &_tx_freq[channel]);

    _tx_freq[channel] += coarse;         // adjust actual

    boost::uint8_t high;

    boost::uint8_t mid;

    boost::uint8_t low;

    high = (v >> 16) & 0xff;

    mid  = (v >>  8) & 0xff;

    low  = (v >>  0) & 0xff;

    // write the fine tuning word

    _ad9862_regs.ftw_23_16 = high;

    _ad9862_regs.ftw_15_8 = mid;

    _ad9862_regs.ftw_7_0 = low;

    _ad9862_regs.fine_mode = ad9862_regs_t::FINE_MODE_NCO;

    if (fine < 0)

        _ad9862_regs.neg_fine_tune = ad9862_regs_t::NEG_FINE_TUNE_NEG_SHIFT;

    else

        _ad9862_regs.neg_fine_tune = ad9862_regs_t::NEG_FINE_TUNE_POS_SHIFT;

    this->send_reg(20);

    this->send_reg(21);

    this->send_reg(22);

    this->send_reg(23);

    return true; 

}

/***********************************************************************

 * Codec Control Make

 **********************************************************************/

usrp1_codec_ctrl::sptr usrp1_codec_ctrl::make(usrp1_iface::sptr iface)

{

    return sptr(new usrp1_codec_ctrl_impl(iface));

}

//

// Copyright 2010 Ettus Research LLC

//

// This program is free software: you can redistribute it and/or modify

// it under the terms of the GNU General Public License as published by

// the Free Software Foundation, either version 3 of the License, or

// (at your option) any later version.

//

// This program is distributed in the hope that it will be useful,

// but WITHOUT ANY WARRANTY; without even the implied warranty of

// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

// GNU General Public License for more details.

//

// You should have received a copy of the GNU General Public License

// along with this program.  If not, see <http://www.gnu.org/licenses/>.

//

#ifndef INCLUDED_USRP1_CODEC_CTRL_HPP

#define INCLUDED_USRP1_CODEC_CTRL_HPP

#include "usrp1_iface.hpp"

#include <boost/shared_ptr.hpp>

#include <boost/utility.hpp>

/*!

 * The usrp1 codec control:

 * - Init/power down codec.

 * - Read aux adc, write aux dac.

 */

class usrp1_codec_ctrl : boost::noncopyable{

public:

    typedef boost::shared_ptr<usrp1_codec_ctrl> sptr;

    /*!

     * Make a new clock control object.

     * \param iface the usrp1 iface object

     * \return the clock control object

     */

    static sptr make(usrp1_iface::sptr iface);

    //! aux adc identifier constants

    enum aux_adc_t{

        AUX_ADC_A2 = 0xA2,

        AUX_ADC_A1 = 0xA1,

        AUX_ADC_B2 = 0xB2,

        AUX_ADC_B1 = 0xB1

    };

    /*!

     * Read an auxiliary adc:

     * The internals remember which aux adc was read last.

     * Therefore, the aux adc switch is only changed as needed.

     * \param which which of the 4 adcs

     * \return a value in volts

     */

    virtual float read_aux_adc(aux_adc_t which) = 0;

    //! aux dac identifier constants

    enum aux_dac_t{

        AUX_DAC_A = 0xA,

        AUX_DAC_B = 0xB,

        AUX_DAC_C = 0xC,

        AUX_DAC_D = 0xD

    };

    /*!

     * Write an auxiliary dac.

     * \param which which of the 4 dacs

     * \param volts the level in in volts

     */

    virtual void write_aux_dac(aux_dac_t which, float volts) = 0;

    virtual bool set_duc_freq(double freq) = 0;

};

#endif /* INCLUDED_USRP1_CODEC_CTRL_HPP */

//

// Copyright 2010 Ettus Research LLC

//

// This program is free software: you can redistribute it and/or modify

// it under the terms of the GNU General Public License as published by

// the Free Software Foundation, either version 3 of the License, or

// (at your option) any later version.

//

// This program is distributed in the hope that it will be useful,

// but WITHOUT ANY WARRANTY; without even the implied warranty of

// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

// GNU General Public License for more details.

//

// You should have received a copy of the GNU General Public License

// along with this program.  If not, see <http://www.gnu.org/licenses/>.

//

#include "usrp1_impl.hpp"

#include <uhd/usrp/codec_props.hpp>

#include <boost/bind.hpp>

using namespace uhd;

using namespace uhd::usrp;

/***********************************************************************

 * Helper Methods

 **********************************************************************/

void usrp1_impl::codec_init(void)

{

    //make proxies

    _rx_codec_proxy = wax_obj_proxy::make(

                          boost::bind(&usrp1_impl::rx_codec_get, this, _1, _2),

                          boost::bind(&usrp1_impl::rx_codec_set, this, _1, _2));

    _tx_codec_proxy = wax_obj_proxy::make(

                          boost::bind(&usrp1_impl::tx_codec_get, this, _1, _2),

                          boost::bind(&usrp1_impl::tx_codec_set, this, _1, _2));

}    

/***********************************************************************

 * RX Codec Properties

 **********************************************************************/

static const std::string ad9862_pga_gain_name = "ad9862 pga";

void usrp1_impl::rx_codec_get(const wax::obj &key_, wax::obj &val)

{

    wax::obj key; std::string name;

    boost::tie(key, name) = extract_named_prop(key_);

    //handle the get request conditioned on the key

    switch(key.as<codec_prop_t>()) {

    case CODEC_PROP_NAME:

        val = std::string("usrp1 adc - ad9862");

        return;

    case CODEC_PROP_OTHERS:

        val = prop_names_t();

        return;

    case CODEC_PROP_GAIN_NAMES:

        val = prop_names_t(1, ad9862_pga_gain_name);

        return;

    case CODEC_PROP_GAIN_RANGE:

        UHD_ASSERT_THROW(name == ad9862_pga_gain_name);

        val = usrp1_codec_ctrl::rx_pga_gain_range;

        return;

    case CODEC_PROP_GAIN_I:

        UHD_ASSERT_THROW(name == ad9862_pga_gain_name);

        val = _codec_ctrl->get_rx_pga_gain('A');

        return;

    case CODEC_PROP_GAIN_Q:

        UHD_ASSERT_THROW(name == ad9862_pga_gain_name);

        val = _codec_ctrl->get_rx_pga_gain('B');

        return;

    default: UHD_THROW_PROP_GET_ERROR();

    }

}

void usrp1_impl::rx_codec_set(const wax::obj &, const wax::obj &)

{

    wax::obj key; std::string name;

    boost::tie(key, name) = extract_named_prop(key_);

    //handle the set request conditioned on the key

    switch(key.as<codec_prop_t>()) {

    case CODEC_PROP_GAIN_I:

        UHD_ASSERT_THROW(name == ad9862_pga_gain_name);

        _codec_ctrl->set_rx_pga_gain(val.as<float>(), 'A');

        return;

    case CODEC_PROP_GAIN_Q:

        UHD_ASSERT_THROW(name == ad9862_pga_gain_name);

        _codec_ctrl->set_rx_pga_gain(val.as<float>(), 'B');

        return;

    default: UHD_THROW_PROP_SET_ERROR();

    }

}

/***********************************************************************

 * TX Codec Properties

 **********************************************************************/

void usrp1_impl::tx_codec_get(const wax::obj &key_, wax::obj &val)

{

    wax::obj key; std::string name;

    boost::tie(key, name) = extract_named_prop(key_);

    //handle the get request conditioned on the key

    switch(key.as<codec_prop_t>()) {

    case CODEC_PROP_NAME:

        val = std::string("usrp1 dac - ad9862");

        return;

    case CODEC_PROP_OTHERS:

        val = prop_names_t();

        return;

    case CODEC_PROP_GAIN_NAMES:

        val = prop_names_t(1, ad9862_pga_gain_name);

        return;

    case CODEC_PROP_GAIN_RANGE:

        UHD_ASSERT_THROW(name == ad9862_pga_gain_name);

        val = usrp1_codec_ctrl::tx_pga_gain_range;

        return;

    case CODEC_PROP_GAIN_I: //only one gain for I and Q

    case CODEC_PROP_GAIN_Q:

        UHD_ASSERT_THROW(name == ad9862_pga_gain_name);

        val = _codec_ctrl->get_tx_pga_gain();

        return;

    default: UHD_THROW_PROP_GET_ERROR();

    }

}

void usrp1_impl::tx_codec_set(const wax::obj &, const wax::obj &)

{

    wax::obj key; std::string name;

    boost::tie(key, name) = extract_named_prop(key_);

    //handle the set request conditioned on the key

    switch(key.as<codec_prop_t>()){

    case CODEC_PROP_GAIN_I: //only one gain for I and Q

    case CODEC_PROP_GAIN_Q:

        UHD_ASSERT_THROW(name == ad9862_pga_gain_name);

        _codec_ctrl->set_tx_pga_gain(val.as<float>());

        return;

    default: UHD_THROW_PROP_SET_ERROR();

    }

}

//

// Copyright 2010 Ettus Research LLC

//

// This program is free software: you can redistribute it and/or modify

// it under the terms of the GNU General Public License as published by

// the Free Software Foundation, either version 3 of the License, or

// (at your option) any later version.

//

// This program is distributed in the hope that it will be useful,

// but WITHOUT ANY WARRANTY; without even the implied warranty of

// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

// GNU General Public License for more details.

//

// You should have received a copy of the GNU General Public License

// along with this program.  If not, see <http://www.gnu.org/licenses/>.

//

#include "usrp1_iface.hpp"

#include "fpga_regs_common.h"

#include "usrp_spi_defs.h"

#include "clock_ctrl.hpp"

#include "codec_ctrl.hpp"

#include <uhd/usrp/dboard_iface.hpp>

#include <uhd/types/dict.hpp>

#include <uhd/utils/assert.hpp>

#include <boost/assign/list_of.hpp>

#include <iostream>

using namespace uhd;

using namespace uhd::usrp;

using namespace boost::assign;

class usrp1_dboard_iface : public dboard_iface {

public:

    usrp1_dboard_iface(usrp1_iface::sptr iface,

                       usrp1_clock_ctrl::sptr clock,

                       usrp1_codec_ctrl::sptr codec)

    {

        _iface = iface;

        _clock = clock;

        _codec = codec;

        //init the clock rate shadows

        this->set_clock_rate(UNIT_RX, _clock->get_master_clock_freq());

        this->set_clock_rate(UNIT_TX, _clock->get_master_clock_freq());

    }

    ~usrp1_dboard_iface()

    {

        /* NOP */

    }

    std::string get_mboard_name()

    {

        return "usrp1";

    }

    void write_aux_dac(unit_t, aux_dac_t, float);

    float read_aux_adc(unit_t, aux_adc_t);

    void set_pin_ctrl(unit_t, boost::uint16_t);

    void set_atr_reg(unit_t, atr_reg_t, boost::uint16_t);

    void set_gpio_ddr(unit_t, boost::uint16_t);

    void write_gpio(unit_t, boost::uint16_t);

    boost::uint16_t read_gpio(unit_t);

    void write_i2c(boost::uint8_t, const byte_vector_t &);

    byte_vector_t read_i2c(boost::uint8_t, size_t);

    void write_spi(unit_t unit,

                   const spi_config_t &config,

                   boost::uint32_t data,

                   size_t num_bits);

    boost::uint32_t read_write_spi(unit_t unit,

                                   const spi_config_t &config,

                                   boost::uint32_t data,

                                   size_t num_bits);

    void set_clock_rate(unit_t, double);

    std::vector<double> get_clock_rates(unit_t);

    double get_clock_rate(unit_t);

    void set_clock_enabled(unit_t, bool);

private:

    usrp1_iface::sptr _iface;

    usrp1_clock_ctrl::sptr _clock;

    usrp1_codec_ctrl::sptr _codec;

    uhd::dict<unit_t, double> _clock_rates;

};

/***********************************************************************

 * Make Function

 **********************************************************************/

dboard_iface::sptr make_usrp1_dboard_iface(usrp1_iface::sptr iface,

                                           usrp1_clock_ctrl::sptr clock,

                                           usrp1_codec_ctrl::sptr codec)

{

    return dboard_iface::sptr(new usrp1_dboard_iface(iface, clock, codec));

}

/***********************************************************************

 * Clock Rates

 **********************************************************************/

void usrp1_dboard_iface::set_clock_rate(unit_t unit, double rate)

{

    _clock_rates[unit] = rate;

    switch(unit) {

    case UNIT_RX: return _clock->set_rx_dboard_clock_rate(rate);    

    case UNIT_TX: return _clock->set_tx_dboard_clock_rate(rate);    

    }

}

/*

 * TODO: if this is a dbsrx return the rate of 4MHZ and set FPGA magic

 */

std::vector<double> usrp1_dboard_iface::get_clock_rates(unit_t unit)

{

    switch(unit) {

    case UNIT_RX: return _clock->get_rx_dboard_clock_rates();

    case UNIT_TX: return _clock->get_tx_dboard_clock_rates();

    default: UHD_THROW_INVALID_CODE_PATH();

    }

}

double usrp1_dboard_iface::get_clock_rate(unit_t unit)

{

    return _clock_rates[unit];

}

void usrp1_dboard_iface::set_clock_enabled(unit_t unit, bool enb)

{

    switch(unit) {

    case UNIT_RX: return _clock->enable_rx_dboard_clock(enb);

    case UNIT_TX: return _clock->enable_tx_dboard_clock(enb);

    }

}

/***********************************************************************

 * GPIO

 **********************************************************************/

void usrp1_dboard_iface::set_pin_ctrl(unit_t unit, boost::uint16_t value)

{

    switch(unit) {

    case UNIT_RX:

         _iface->poke32(FR_ATR_MASK_1, value);

         _iface->poke32(FR_ATR_MASK_3, 0x00000000);

         break; 

    case UNIT_TX:

         _iface->poke32(FR_ATR_MASK_0, value);

         _iface->poke32(FR_ATR_MASK_2, 0x00000000);

         break;

    }

}

void usrp1_dboard_iface::set_gpio_ddr(unit_t unit, boost::uint16_t value)

{

    switch(unit) {

    case UNIT_RX:

        _iface->poke32(FR_OE_1, 0xffff0000 | value);

        _iface->poke32(FR_OE_3, 0xffff0000);

        break; 

    case UNIT_TX:

        _iface->poke32(FR_OE_0, 0xffff0000 | value);

        _iface->poke32(FR_OE_2, 0xffff0000);

        break;

    }

}

void usrp1_dboard_iface::write_gpio(unit_t unit, boost::uint16_t value)

{

    switch(unit) {

    case UNIT_RX:

        _iface->poke32(FR_IO_1, 0xffff0000 | value);

        break;

    case UNIT_TX:

        _iface->poke32(FR_IO_0, 0xffff0000 | value);

        break;

    }

}

boost::uint16_t usrp1_dboard_iface::read_gpio(unit_t unit)

{

    boost::uint32_t out_value;

    boost::uint16_t ret_value;

    switch(unit) {

    case UNIT_RX:

        //magic

        out_value = _iface->peek32(1);

        ret_value = (out_value >> 16) & 0x0000ffff;

        return ret_value;

    case UNIT_TX:

        //magic

        out_value = _iface->peek32(1);

        ret_value = (out_value >>  0) & 0x0000ffff;

        return ret_value;

    }

    UHD_ASSERT_THROW(false);

}

void usrp1_dboard_iface::set_atr_reg(unit_t unit,

                                     atr_reg_t atr, boost::uint16_t value)

{

    if ((atr == ATR_REG_IDLE) || (atr == ATR_REG_FULL_DUPLEX)) {

        std::cerr << "error: set_atr_reg(): unsupported state" << std::endl;

        return;

    }

    switch(unit) {

    case UNIT_RX:

        _iface->poke32(FR_ATR_RXVAL_1, value);

        _iface->poke32(FR_ATR_RXVAL_3, 0x0000);

        break; 

    case UNIT_TX:

        //_iface->poke32(FR_ATR_TXVAL_0, value);

        _iface->poke32(FR_ATR_TXVAL_0, 0x0000);

        _iface->poke32(FR_ATR_TXVAL_2, 0x0000);

        break;

    }

}

/***********************************************************************

 * SPI

 **********************************************************************/

/*!

 * Static function to convert a unit type to a spi slave device number.

 * \param unit the dboard interface unit type enum

 * \return the slave device number

 */

static boost::uint32_t unit_to_otw_spi_dev(dboard_iface::unit_t unit)

{

    switch(unit) {

    case dboard_iface::UNIT_TX: return SPI_ENABLE_TX_A; 

    case dboard_iface::UNIT_RX: return SPI_ENABLE_RX_A;

    }

    throw std::invalid_argument("unknown unit type");

}

void usrp1_dboard_iface::write_spi(unit_t unit,

                                   const spi_config_t &config,

                                   boost::uint32_t data,

                                   size_t num_bits)

{

    _iface->transact_spi(unit_to_otw_spi_dev(unit),

                         config, data, num_bits, false);

}

boost::uint32_t usrp1_dboard_iface::read_write_spi(unit_t unit,

                                                   const spi_config_t &config,

                                                   boost::uint32_t data,

                                                   size_t num_bits)

{

    return _iface->transact_spi(unit_to_otw_spi_dev(unit),

                                config, data, num_bits, true);

}

/***********************************************************************

 * I2C

 **********************************************************************/

void usrp1_dboard_iface::write_i2c(boost::uint8_t addr,

                                   const byte_vector_t &bytes)

{

    return _iface->write_i2c(addr, bytes);

}

byte_vector_t usrp1_dboard_iface::read_i2c(boost::uint8_t addr,

                                           size_t num_bytes)

{

    return _iface->read_i2c(addr, num_bytes);

}

/***********************************************************************

 * Aux DAX/ADC

 **********************************************************************/

void usrp1_dboard_iface::write_aux_dac(dboard_iface::unit_t,

                                       aux_dac_t which, float value)

{

    //same aux dacs for each unit

    static const uhd::dict<aux_dac_t, usrp1_codec_ctrl::aux_dac_t>

        which_to_aux_dac = map_list_of

                                     (AUX_DAC_A, usrp1_codec_ctrl::AUX_DAC_A)

                                     (AUX_DAC_B, usrp1_codec_ctrl::AUX_DAC_B)

                                     (AUX_DAC_C, usrp1_codec_ctrl::AUX_DAC_C)

                                     (AUX_DAC_D, usrp1_codec_ctrl::AUX_DAC_D);

    _codec->write_aux_dac(which_to_aux_dac[which], value);

}

float usrp1_dboard_iface::read_aux_adc(dboard_iface::unit_t unit,

                                       aux_adc_t which)

{

    static const

    uhd::dict<unit_t, uhd::dict<aux_adc_t, usrp1_codec_ctrl::aux_adc_t> >

        unit_to_which_to_aux_adc = map_list_of(UNIT_RX, map_list_of

                                    (AUX_ADC_A, usrp1_codec_ctrl::AUX_ADC_A1)

                                    (AUX_ADC_B, usrp1_codec_ctrl::AUX_ADC_B1))

                                              (UNIT_TX, map_list_of

                                    (AUX_ADC_A, usrp1_codec_ctrl::AUX_ADC_A2)

                                    (AUX_ADC_B, usrp1_codec_ctrl::AUX_ADC_B2));

    return _codec->read_aux_adc(unit_to_which_to_aux_adc[unit][which]);

}

//

// Copyright 2010 Ettus Research LLC

//

// This program is free software: you can redistribute it and/or modify

// it under the terms of the GNU General Public License as published by

// the Free Software Foundation, either version 3 of the License, or

// (at your option) any later version.

//

// This program is distributed in the hope that it will be useful,

// but WITHOUT ANY WARRANTY; without even the implied warranty of

// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

// GNU General Public License for more details.

//

// You should have received a copy of the GNU General Public License

// along with this program.  If not, see <http://www.gnu.org/licenses/>.

//

#include "usrp1_impl.hpp"

#include "usrp_i2c_addr.h"

#include "../dsp_utils.hpp"

#include "../misc_utils.hpp"

#include <uhd/utils/assert.hpp>

#include <uhd/usrp/dboard_props.hpp>

#include <uhd/usrp/subdev_props.hpp>

#include <boost/bind.hpp>

#include <iostream>

using namespace uhd;

using namespace uhd::usrp;

/***********************************************************************

 * Dboard Initialization

 **********************************************************************/

void usrp1_impl::dboard_init(void)

{

    _rx_db_eeprom = dboard_eeprom_t(

          _iface->read_eeprom(I2C_ADDR_RX_A, 0, dboard_eeprom_t::num_bytes()));

    _tx_db_eeprom = dboard_eeprom_t(

          _iface->read_eeprom(I2C_ADDR_TX_A, 0, dboard_eeprom_t::num_bytes()));

    //create a new dboard interface and manager

    _dboard_iface = make_usrp1_dboard_iface(_iface, _clock_ctrl, _codec_ctrl);

    _dboard_manager = dboard_manager::make(_rx_db_eeprom.id,

                                           _tx_db_eeprom.id,

                                           _dboard_iface);

    //setup the dboard proxies

    _rx_dboard_proxy = wax_obj_proxy::make(

                         boost::bind(&usrp1_impl::rx_dboard_get, this, _1, _2),

                         boost::bind(&usrp1_impl::rx_dboard_set, this, _1, _2));

    _tx_dboard_proxy = wax_obj_proxy::make(

                         boost::bind(&usrp1_impl::tx_dboard_get, this, _1, _2),

                         boost::bind(&usrp1_impl::tx_dboard_set, this, _1, _2));

}

/***********************************************************************

 * Helper functions 

 **********************************************************************/

//static int slot_to_i2c_addr (int slot)

//{

//    switch (slot) {

//    case SLOT_TX_A:

//        return I2C_ADDR_TX_A;

//    case SLOT_RX_A:

//        return I2C_ADDR_RX_A;

//    case SLOT_TX_B:

//        return I2C_ADDR_TX_B;

//    case SLOT_RX_B:

//        return I2C_ADDR_RX_B;

//    default:

//        return -1;

//    }

//}

/***********************************************************************

 * RX Dboard Get

 **********************************************************************/

void usrp1_impl::rx_dboard_get(const wax::obj &key_, wax::obj &val)

{

    wax::obj key; std::string name;

    boost::tie(key, name) = extract_named_prop(key_);

    //handle the get request conditioned on the key

    switch(key.as<dboard_prop_t>()){

    case DBOARD_PROP_NAME:

        val = std::string("usrp1 dboard (rx unit)");

        return;

    case DBOARD_PROP_SUBDEV:

        val = _dboard_manager->get_rx_subdev(name);

        return;

    case DBOARD_PROP_SUBDEV_NAMES:

        val = _dboard_manager->get_rx_subdev_names();

        return;

    case DBOARD_PROP_DBOARD_ID:

        val = _rx_db_eeprom.id;

        return;

    case DBOARD_PROP_DBOARD_IFACE:

        val = _dboard_iface;

        return;

    case DBOARD_PROP_CODEC:

        val = _rx_codec_proxy->get_link();

        return;

    case DBOARD_PROP_GAIN_GROUP:

        val = make_gain_group(_dboard_manager->get_rx_subdev(name),

                              _rx_codec_proxy->get_link());

        return;

    default: UHD_THROW_PROP_GET_ERROR();

    }

}

/***********************************************************************

 * RX Dboard Set

 **********************************************************************/

void usrp1_impl::rx_dboard_set(const wax::obj &key, const wax::obj &val)

{

    switch(key.as<dboard_prop_t>()) {

    case DBOARD_PROP_DBOARD_ID:

        _rx_db_eeprom.id = val.as<dboard_id_t>();

        _iface->write_eeprom(I2C_ADDR_RX_A, 0, 

                             _rx_db_eeprom.get_eeprom_bytes());

        return;

    default:

        UHD_THROW_PROP_SET_ERROR();

    }

}

/***********************************************************************

 * TX Dboard Get

 **********************************************************************/

void usrp1_impl::tx_dboard_get(const wax::obj &key_, wax::obj &val)

{

    wax::obj key; std::string name;

    boost::tie(key, name) = extract_named_prop(key_);

    //handle the get request conditioned on the key

    switch(key.as<dboard_prop_t>()){

    case DBOARD_PROP_NAME:

        val = std::string("usrp1 dboard (tx unit)");

        return;

    case DBOARD_PROP_SUBDEV:

        val = _dboard_manager->get_tx_subdev(name);

        return;

    case DBOARD_PROP_SUBDEV_NAMES:

        val = _dboard_manager->get_tx_subdev_names();

        return;

    case DBOARD_PROP_DBOARD_ID:

        val = _tx_db_eeprom.id;

        return;

    case DBOARD_PROP_DBOARD_IFACE:

        val = _dboard_iface;

        return;

    case DBOARD_PROP_CODEC:

        val = _tx_codec_proxy->get_link();

        return;

    case DBOARD_PROP_GAIN_GROUP:

        val = make_gain_group(_dboard_manager->get_tx_subdev(name),

                              _tx_codec_proxy->get_link());

        return;

    default: UHD_THROW_PROP_GET_ERROR();

    }

}

/***********************************************************************

 * TX Dboard Set

 **********************************************************************/

void usrp1_impl::tx_dboard_set(const wax::obj &key, const wax::obj &val)

{

    switch(key.as<dboard_prop_t>()) {

    case DBOARD_PROP_DBOARD_ID:

        _tx_db_eeprom.id = val.as<dboard_id_t>();

        _iface->write_eeprom(I2C_ADDR_TX_A, 0, _tx_db_eeprom.get_eeprom_bytes());

        return;

    default: UHD_THROW_PROP_SET_ERROR();

    }

}

//

// Copyright 2010 Ettus Research LLC

//

// This program is free software: you can redistribute it and/or modify

// it under the terms of the GNU General Public License as published by

// the Free Software Foundation, either version 3 of the License, or

// (at your option) any later version.