Revision 898adebb host/lib/usrp/dboard/db_dbsrx.cpp

b/host/lib/usrp/dboard/db_dbsrx.cpp
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#include <uhd/utils/static.hpp>
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#include <uhd/utils/assert.hpp>
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#include <uhd/utils/algorithm.hpp>
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#include <uhd/utils/warning.hpp>
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#include <uhd/types/ranges.hpp>
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#include <uhd/types/dict.hpp>
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#include <uhd/usrp/subdev_props.hpp>
......
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/***********************************************************************
42 43
 * The DBSRX constants
43 44
 **********************************************************************/
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static const bool dbsrx_debug = true;
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static const bool dbsrx_debug = false;
45 46

  
46 47
static const freq_range_t dbsrx_freq_range(0.8e9, 2.4e9);
47 48

  
......
113 114
        for(boost::uint8_t start_addr=start_reg; start_addr <= stop_reg; start_addr += sizeof(boost::uint32_t)){
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            int num_bytes = int(stop_reg - start_addr + 1) > int(sizeof(boost::uint32_t)) ? sizeof(boost::uint32_t) : stop_reg - start_addr + 1;
115 116

  
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            //create address to start reading register data
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            byte_vector_t address_vector(1);
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            address_vector[0] = start_addr;
119

  
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            /*
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            //send the address
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            this->get_iface()->write_i2c(
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                _max2118_addr, address_vector
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            );
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            */
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            //create buffer for register data
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            byte_vector_t regs_vector(num_bytes);
129 119

  
......
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            for(boost::uint8_t i=0; i < num_bytes; i++){
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                if (i + start_addr >= status_addr){
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                    _max2118_read_regs.set_reg(i + start_addr, regs_vector[i]);
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                    if(dbsrx_debug) std::cerr << boost::format(
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                        "DBSRX: set reg 0x%02x, value 0x%04x"
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                    ) % int(i + start_addr) % int(_max2118_read_regs.get_reg(i + start_addr)) << std::endl;
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                }
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                if(dbsrx_debug) std::cerr << boost::format(
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                    "DBSRX: read reg 0x%02x, value 0x%04x, start_addr = 0x%04x, num_bytes %d"
......
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     * \return true for locked
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     */
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    bool get_locked(void){
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        read_reg(0x0, 0x1);
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        read_reg(0x0, 0x0);
155 142

  
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        //mask and return lock detect
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        bool locked = 5 >= _max2118_read_regs.adc && _max2118_read_regs.adc >= 2;
......
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    return dboard_base::sptr(new dbsrx(args, 0x67));
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}
176 163

  
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//FIXME different dbid for USRP1 also
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//dbid for USRP2 version
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UHD_STATIC_BLOCK(reg_dbsrx_dboard){
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    //register the factory function for the rx dbid
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    dboard_manager::register_dboard(0x000D, &make_dbsrx, "DBSRX");
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}
182 169

  
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//dbid for USRP1 version
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UHD_STATIC_BLOCK(reg_dbsrx_on_usrp1_dboard){
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    //register the factory function for the rx dbid
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    dboard_manager::register_dboard(0x0002, &make_dbsrx, "DBSRX");
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}
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/***********************************************************************
184 177
 * Structors
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 **********************************************************************/
186 179
dbsrx::dbsrx(ctor_args_t args, boost::uint8_t max2118_addr) : rx_dboard_base(args){
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    //warn user about incorrect DBID on USRP1, requires R193 populated
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    if (this->get_iface()->get_mboard_name() == "usrp1" and this->get_rx_id() == 0x000D)
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        uhd::print_warning(
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            str(boost::format(
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                "DBSRX: incorrect dbid\n"
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                "%s expects dbid 0x0002 and R193\n"
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                "found dbid == %d\n"
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                "Please see the daughterboard app notes" 
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                ) % (this->get_iface()->get_mboard_name()) % (this->get_rx_id().to_pp_string()))
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        );
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    //warn user about incorrect DBID on non-USRP1, requires R194 populated
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    if (this->get_iface()->get_mboard_name() != "usrp1" and this->get_rx_id() == 0x0002)
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        uhd::print_warning(
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            str(boost::format(
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                "DBSRX: incorrect dbid\n"
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                "%s expects dbid 0x000D and R194\n"
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                "found dbid == %d\n"
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                "Please see the daughterboard app notes" 
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                ) % (this->get_iface()->get_mboard_name()) % (this->get_rx_id().to_pp_string()))
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        );
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    //enable only the clocks we need
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    this->get_iface()->set_clock_enabled(dboard_iface::UNIT_RX, true);
189 204

  
......
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    //send initial register settings
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    this->send_reg(0x0, 0x5);
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    //set defaults for LO, gains
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    //set defaults for LO, gains, and filter bandwidth
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    _bandwidth = 33e6;
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    set_lo_freq(dbsrx_freq_range.min);
218

  
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    BOOST_FOREACH(const std::string &name, dbsrx_gain_ranges.keys()){
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        set_gain(dbsrx_gain_ranges[name].min, name);
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    }
205 222

  
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    set_bandwidth(22.27e6); // default bandwidth from datasheet
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    get_locked();
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    set_bandwidth(33e6); // default bandwidth from datasheet
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}
210 225

  
211 226
dbsrx::~dbsrx(void){
......
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    target_freq = std::clip(target_freq, dbsrx_freq_range.min, dbsrx_freq_range.max);
220 235

  
221 236
    double actual_freq=0.0, pfd_freq=0.0, ref_clock=0.0;
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    int R=0, N=0, r=0;
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    int R=0, N=0, r=0, m=0;
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    bool update_filter_settings = false;
223 239

  
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    //choose refclock
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    std::vector<double> clock_rates = this->get_iface()->get_clock_rates(dboard_iface::UNIT_RX);
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    BOOST_FOREACH(ref_clock, std::reversed(std::sorted(clock_rates))){
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        if (ref_clock != 4e6) continue;
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        if (ref_clock > 27.0e6) continue;
244

  
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        //choose m_divider such that filter tuning constraint is met
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        m = 31;
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        while ((ref_clock/m < 1e6 or ref_clock/m > 2.5e6) and m > 0){ m--; }
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        if(dbsrx_debug) std::cerr << boost::format(
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            "DBSRX: trying ref_clock %f and m_divider %d"
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        ) % (this->get_iface()->get_clock_rate(dboard_iface::UNIT_RX)) % m << std::endl;
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253
        if (m >= 32) continue;
228 254

  
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        //choose R
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        for(r = 0; r <= 6; r += 1) {
......
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    } 
250 276

  
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    //Assert because we failed to find a suitable combination of ref_clock, R and N 
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    UHD_ASSERT_THROW(ref_clock/(1 << m) < 1e6 or ref_clock/(1 << m) > 2.5e6);
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    UHD_ASSERT_THROW((pfd_freq < dbsrx_pfd_freq_range.min) or (pfd_freq > dbsrx_pfd_freq_range.max));
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    UHD_ASSERT_THROW((N < 256) or (N > 32768));
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    done_loop:
255 282

  
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    if(dbsrx_debug) std::cerr << boost::format(
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        "DBSRX: choose ref_clock %f and m_divider %d"
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    ) % (this->get_iface()->get_clock_rate(dboard_iface::UNIT_RX)) % m << std::endl;
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    //if ref_clock or m divider changed, we need to update the filter settings
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    if (ref_clock != this->get_iface()->get_clock_rate(dboard_iface::UNIT_RX) or m != _max2118_write_regs.m_divider) update_filter_settings = true;
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    //compute resulting output frequency
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    actual_freq = pfd_freq * N;
258 292

  
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    //apply ref_clock, R, and N settings
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    this->get_iface()->set_clock_rate(dboard_iface::UNIT_RX, ref_clock);
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    ref_clock = this->get_iface()->get_clock_rate(dboard_iface::UNIT_RX);
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    _max2118_write_regs.m_divider = m;
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    _max2118_write_regs.r_divider = (max2118_write_regs_t::r_divider_t) r;
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    _max2118_write_regs.set_n_divider(N);
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    _max2118_write_regs.ade_vco_ade_read = max2118_write_regs_t::ADE_VCO_ADE_READ_ENABLED;
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    send_reg(0x4,0x4);
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    send_reg(0x0,0x2);
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    //compute prescaler variables
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    int scaler = actual_freq > 1125e6 ? 2 : 4;
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    _max2118_write_regs.div2 = scaler == 4 ? max2118_write_regs_t::DIV2_DIV4 : max2118_write_regs_t::DIV2_DIV2;
271 304

  
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    if(dbsrx_debug) std::cerr << boost::format(
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        "DBSRX: scaler %d, actual_freq %f MHz, register bit: %d"
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    ) % scaler % (actual_freq/1e6) % int(_max2118_write_regs.div2) << std::endl;
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    //compute vco frequency and select vco
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    double vco_freq = actual_freq * scaler;
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    int vco;
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    if (vco_freq < 2433e6)
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        vco = 0;
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        _max2118_write_regs.osc_band = 0;
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    else if (vco_freq < 2711e6)
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        vco=1;
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        _max2118_write_regs.osc_band = 1;
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    else if (vco_freq < 3025e6)
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        vco=2;
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        _max2118_write_regs.osc_band = 2;
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    else if (vco_freq < 3341e6)
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        vco=3;
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        _max2118_write_regs.osc_band = 3;
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    else if (vco_freq < 3727e6)
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        vco=4;
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        _max2118_write_regs.osc_band = 4;
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    else if (vco_freq < 4143e6)
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        vco=5;
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        _max2118_write_regs.osc_band = 5;
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    else if (vco_freq < 4493e6)
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        vco=6;
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        _max2118_write_regs.osc_band = 6;
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    else
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        vco=7;
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        _max2118_write_regs.osc_band = 7;
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    //apply vco selection
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    _max2118_write_regs.osc_band = vco;
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    send_reg(0x2, 0x2);
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    //send settings over i2c
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    send_reg(0x0, 0x4);
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    //check vtune for lock condition
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    read_reg(0x0, 0x1);
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    read_reg(0x0, 0x0);
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    if(dbsrx_debug) std::cerr << boost::format(
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        "DBSRX: initial guess for vco %d, vtune adc %d"
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    ) % int(_max2118_write_regs.osc_band) % int(_max2118_read_regs.adc) << std::endl;
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    //if we are out of lock for chosen vco, change vco
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    while ((_max2118_read_regs.adc == 0) or (_max2118_read_regs.adc == 7)){
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        //vtune is too low, try lower frequency vco
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        if (_max2118_read_regs.adc == 0){
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            UHD_ASSERT_THROW(_max2118_write_regs.osc_band <= 0);
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            if (_max2118_write_regs.osc_band == 0){
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                uhd::print_warning(
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                    str(boost::format(
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                        "DBSRX: Tuning exceeded vco range, _max2118_write_regs.osc_band == %d\n" 
347
                        ) % int(_max2118_write_regs.osc_band))
348
                );
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                UHD_ASSERT_THROW(_max2118_read_regs.adc == 0);
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            }
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            if (_max2118_write_regs.osc_band <= 0) break;
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            _max2118_write_regs.osc_band -= 1;
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        }
306 354

  
307 355
        //vtune is too high, try higher frequency vco
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        if (_max2118_read_regs.adc == 7){
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            UHD_ASSERT_THROW(_max2118_write_regs.osc_band >= 7);
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            if (_max2118_write_regs.osc_band == 7){
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                uhd::print_warning(
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                    str(boost::format(
360
                        "DBSRX: Tuning exceeded vco range, _max2118_write_regs.osc_band == %d\n" 
361
                        ) % int(_max2118_write_regs.osc_band))
362
                );
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                UHD_ASSERT_THROW(_max2118_read_regs.adc == 0);
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            }
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            if (_max2118_write_regs.osc_band >= 7) break;
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            _max2118_write_regs.osc_band += 1;
311 367
        }
312 368

  
369
        if(dbsrx_debug) std::cerr << boost::format(
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            "DBSRX: trying vco %d, vtune adc %d"
371
        ) % int(_max2118_write_regs.osc_band) % int(_max2118_read_regs.adc) << std::endl;
372

  
313 373
        //update vco selection and check vtune
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        send_reg(0x2, 0x2);
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        read_reg(0x0, 0x0);
316 376
    }
317 377
      
378
    if(dbsrx_debug) std::cerr << boost::format(
379
        "DBSRX: final vco %d, vtune adc %d"
380
    ) % int(_max2118_write_regs.osc_band) % int(_max2118_read_regs.adc) << std::endl;
381

  
318 382
    //select charge pump bias current
319 383
    if (_max2118_read_regs.adc <= 2) _max2118_write_regs.cp_current = max2118_write_regs_t::CP_CURRENT_I_CP_100UA;
320 384
    else if (_max2118_read_regs.adc >= 5) _max2118_write_regs.cp_current = max2118_write_regs_t::CP_CURRENT_I_CP_400UA;
......
335 399
        << boost::format("    Target Freq=%fMHz\n") % (target_freq/1e6)
336 400
        << boost::format("    Actual Freq=%fMHz\n") % (_lo_freq/1e6)
337 401
        << std::endl;
402

  
403
    if (update_filter_settings) set_bandwidth(_bandwidth);
404
    get_locked();
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}
339 406

  
340 407
/***********************************************************************
......
377 444
    gain = std::clip<float>(gain, dbsrx_gain_ranges["GC1"].min, dbsrx_gain_ranges["GC1"].max);
378 445

  
379 446
    //voltage level constants
380
    static const float max_volts = float(2.7), min_volts = float(1.2);
447
    static const float max_volts = float(1.2), min_volts = float(2.7);
381 448
    static const float slope = (max_volts-min_volts)/dbsrx_gain_ranges["GC1"].max;
382 449

  
383 450
    //calculate the voltage for the aux dac
......
413 480
void dbsrx::set_bandwidth(float bandwidth){
414 481
    //clip the input
415 482
    bandwidth = std::clip<float>(bandwidth, 4e6, 33e6);
416
    
417
    //calculate ref_freq
418
    float ref_freq = this->get_iface()->get_clock_rate(dboard_iface::UNIT_RX);
419 483

  
420
    //FIXME this contraint needs to be in the set_freq and needs to assert if it can't hit the range
421
    //calculate acceptable m_divider for filter tuning
422
    int m = 1;
423
    while (ref_freq/m < 1e6 or ref_freq/m > 2.5e6){ m++; }
424
    _max2118_write_regs.m_divider = m;
484
    double ref_clock = this->get_iface()->get_clock_rate(dboard_iface::UNIT_RX);
485
    
486
    //NOTE: _max2118_write_regs.m_divider set in set_lo_freq
425 487

  
426
    _bandwidth = float((ref_freq/1e6/_max2118_write_regs.m_divider)*(4+0.145*_max2118_write_regs.f_dac)*1e6);
488
    //compute f_dac setting
489
    _max2118_write_regs.f_dac = std::clip<int>(int((((bandwidth*_max2118_write_regs.m_divider)/ref_clock) - 4)/0.145),0,127);
427 490

  
428
    _max2118_write_regs.f_dac = int(((bandwidth*_max2118_write_regs.m_divider/ref_freq) - 4)/0.145);
491
    //determine actual bandwidth
492
    _bandwidth = float((ref_clock/(_max2118_write_regs.m_divider))*(4+0.145*_max2118_write_regs.f_dac));
429 493

  
430 494
    if (dbsrx_debug) std::cerr << boost::format(
431 495
        "DBSRX Filter Bandwidth: %f MHz, m: %d, f_dac: %d\n"
432
    ) % (_bandwidth/1e6) % m % int(_max2118_write_regs.f_dac) << std::endl;
496
    ) % (_bandwidth/1e6) % int(_max2118_write_regs.m_divider) % int(_max2118_write_regs.f_dac) << std::endl;
433 497

  
434
    this->send_reg(0x3, 0x5);
498
    this->send_reg(0x3, 0x4);
435 499
}
436 500

  
437 501
/***********************************************************************

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