Revision 45d8240f
| b/host/lib/usrp/usrp1/mboard_impl.cpp | ||
|---|---|---|
| 168 | 168 |
boost::bind(&usrp1_impl::mboard_get, this, _1, _2), |
| 169 | 169 |
boost::bind(&usrp1_impl::mboard_set, this, _1, _2)); |
| 170 | 170 |
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/* |
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* Basic initialization |
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*/ |
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_iface->poke32( 13, 0x00000000); //FR_MODE |
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_iface->poke32( 14, 0x00000000); //FR_DEBUG_EN |
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_iface->poke32( 1, 0x00000001); //FR_RX_SAMPLE_RATE_DEV |
|
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_iface->poke32( 0, 0x00000003); //FR_TX_SAMPLE_RATE_DEV |
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_iface->poke32( 15, 0x0000000f); //FR_DC_OFFSET_CL_EN |
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/* |
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* Reset codecs |
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*/ |
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_iface->poke32( 16, 0x00000000); //FR_ADC_OFFSET_0 |
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_iface->poke32( 17, 0x00000000); //FR_ADC_OFFSET_1 |
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_iface->poke32( 18, 0x00000000); //FR_ADC_OFFSET_2 |
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_iface->poke32( 19, 0x00000000); //FR_ADC_OFFSET_3 |
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/* |
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* Reset GPIO masks |
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*/ |
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_iface->poke32( 6, 0xffff0000); //FR_OE_1 |
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_iface->poke32( 10, 0xffff0000); //FR_IO_1 |
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_iface->poke32( 8, 0xffff0000); //FR_OE_3 |
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_iface->poke32( 12, 0xffff0000); //FR_IO_3 |
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/* |
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* Disable ATR masks and reset state registers |
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*/ |
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_iface->poke32( 23, 0x00000000); //FR_ATR_MASK_1 |
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_iface->poke32( 24, 0x00000000); //FR_ATR_TXVAL_1 |
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_iface->poke32( 25, 0x00000000); //FR_ATR_RXVAL_1 |
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_iface->poke32( 29, 0x00000000); //FR_ATR_MASK_3 |
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_iface->poke32( 30, 0x00000000); //FR_ATR_TXVAL_3 |
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_iface->poke32( 31, 0x00000000); //FR_ATR_RXVAL_3 |
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/* |
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* Set defaults for RX format, decimation, and mux |
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*/ |
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_iface->poke32( 49, 0x00000300); //FR_RX_FORMAT |
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_iface->poke32( 38, 0x000e4e41); //FR_RX_MUX |
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|
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/* |
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* Set defaults for TX format, interpolation, and mux |
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*/ |
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_iface->poke32( 48, 0x00000000); //FR_TX_FORMAT |
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_iface->poke32( 39, 0x00000981); //FR_TX_MUX |
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/* |
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* Reset DDC registers |
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*/ |
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_iface->poke32( 34, 0x00000000); //FR_RX_FREQ_0 |
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_iface->poke32( 44, 0x00000000); //FR_RX_PHASE_0 |
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_iface->poke32( 35, 0x00000000); //FR_RX_FREQ_1 |
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_iface->poke32( 45, 0x00000000); //FR_RX_PHASE_1 |
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_iface->poke32( 36, 0x00000000); //FR_RX_FREQ_2 |
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_iface->poke32( 46, 0x00000000); //FR_RX_PHASE_2 |
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_iface->poke32( 37, 0x00000000); //FR_RX_FREQ_3 |
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_iface->poke32( 47, 0x00000000); //FR_RX_PHASE_3 |
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// Normal mode with no loopback or Rx counting |
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_iface->poke32(FR_MODE, 0x00000000); |
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_iface->poke32(FR_DEBUG_EN, 0x00000000); |
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_iface->poke32(FR_RX_SAMPLE_RATE_DIV, 0x00000001); |
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_iface->poke32(FR_TX_SAMPLE_RATE_DIV, 0x00000003); |
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_iface->poke32(FR_DC_OFFSET_CL_EN, 0x0000000f); |
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// Reset offset correction registers |
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_iface->poke32(FR_ADC_OFFSET_0, 0x00000000); |
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_iface->poke32(FR_ADC_OFFSET_1, 0x00000000); |
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_iface->poke32(FR_ADC_OFFSET_2, 0x00000000); |
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_iface->poke32(FR_ADC_OFFSET_3, 0x00000000); |
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// Set default for RX format to 16-bit I&Q and no half-band filter bypass |
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_iface->poke32(FR_RX_FORMAT, 0x00000300); |
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// Set default for TX format to 16-bit I&Q |
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_iface->poke32(FR_TX_FORMAT, 0x00000000); |
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| 230 | 189 |
} |
| 231 | 190 |
|
| 232 | 191 |
void usrp1_impl::issue_stream_cmd(const stream_cmd_t &stream_cmd) |
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